misc/libtremor/asm_arm.h
author koda
Tue, 23 Aug 2011 03:46:17 +0200
changeset 5662 99083392cd4f
parent 5170 f7e49eff3708
permissions -rw-r--r--
FREE AT LAST!!! SDL came around a (mostly) sane way for implementing rotation events, so we can scrap all the workaround code that has been added to workaround it!! Also this allows us to use proper (internal) multitasking handling and can simplify optional settings and other yet unexplored features. Yay!
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/********************************************************************
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 *                                                                  *
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 * THIS FILE IS PART OF THE OggVorbis 'TREMOR' CODEC SOURCE CODE.   *
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 *                                                                  *
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 * USE, DISTRIBUTION AND REPRODUCTION OF THIS LIBRARY SOURCE IS     *
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 * GOVERNED BY A BSD-STYLE SOURCE LICENSE INCLUDED WITH THIS SOURCE *
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 * IN 'COPYING'. PLEASE READ THESE TERMS BEFORE DISTRIBUTING.       *
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 *                                                                  *
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 * THE OggVorbis 'TREMOR' SOURCE CODE IS (C) COPYRIGHT 1994-2002    *
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 * BY THE Xiph.Org FOUNDATION http://www.xiph.org/                  *
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 *                                                                  *
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 ********************************************************************
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 function: arm7 and later wide math functions
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 ********************************************************************/
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#ifdef _ARM_ASSEM_
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#if !defined(_V_WIDE_MATH) && !defined(_LOW_ACCURACY_)
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#define _V_WIDE_MATH
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static inline ogg_int32_t MULT32(ogg_int32_t x, ogg_int32_t y) {
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  int lo,hi;
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  asm volatile("smull\t%0, %1, %2, %3"
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               : "=&r"(lo),"=&r"(hi)
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               : "%r"(x),"r"(y)
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	       : "cc");
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  return(hi);
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}
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static inline ogg_int32_t MULT31(ogg_int32_t x, ogg_int32_t y) {
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  return MULT32(x,y)<<1;
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}
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static inline ogg_int32_t MULT31_SHIFT15(ogg_int32_t x, ogg_int32_t y) {
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  int lo,hi;
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  asm volatile("smull	%0, %1, %2, %3\n\t"
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	       "movs	%0, %0, lsr #15\n\t"
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	       "adc	%1, %0, %1, lsl #17\n\t"
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               : "=&r"(lo),"=&r"(hi)
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               : "%r"(x),"r"(y)
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	       : "cc");
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  return(hi);
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}
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#define MB() asm volatile ("" : : : "memory")
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static inline void XPROD32(ogg_int32_t  a, ogg_int32_t  b,
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			   ogg_int32_t  t, ogg_int32_t  v,
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			   ogg_int32_t *x, ogg_int32_t *y)
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{
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  int x1, y1, l;
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  asm(	"smull	%0, %1, %4, %6\n\t"
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	"smlal	%0, %1, %5, %7\n\t"
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	"rsb	%3, %4, #0\n\t"
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	"smull	%0, %2, %5, %6\n\t"
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	"smlal	%0, %2, %3, %7"
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	: "=&r" (l), "=&r" (x1), "=&r" (y1), "=r" (a)
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	: "3" (a), "r" (b), "r" (t), "r" (v)
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	: "cc" );
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  *x = x1;
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  MB();
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  *y = y1;
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}
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static inline void XPROD31(ogg_int32_t  a, ogg_int32_t  b,
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			   ogg_int32_t  t, ogg_int32_t  v,
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			   ogg_int32_t *x, ogg_int32_t *y)
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{
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  int x1, y1, l;
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  asm(	"smull	%0, %1, %4, %6\n\t"
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	"smlal	%0, %1, %5, %7\n\t"
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	"rsb	%3, %4, #0\n\t"
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	"smull	%0, %2, %5, %6\n\t"
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	"smlal	%0, %2, %3, %7"
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	: "=&r" (l), "=&r" (x1), "=&r" (y1), "=r" (a)
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	: "3" (a), "r" (b), "r" (t), "r" (v)
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	: "cc" );
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  *x = x1 << 1;
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  MB();
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  *y = y1 << 1;
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}
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static inline void XNPROD31(ogg_int32_t  a, ogg_int32_t  b,
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			    ogg_int32_t  t, ogg_int32_t  v,
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			    ogg_int32_t *x, ogg_int32_t *y)
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{
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  int x1, y1, l;
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  asm(	"rsb	%2, %4, #0\n\t"
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	"smull	%0, %1, %3, %5\n\t"
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	"smlal	%0, %1, %2, %6\n\t"
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	"smull	%0, %2, %4, %5\n\t"
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	"smlal	%0, %2, %3, %6"
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	: "=&r" (l), "=&r" (x1), "=&r" (y1)
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	: "r" (a), "r" (b), "r" (t), "r" (v)
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	: "cc" );
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  *x = x1 << 1;
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  MB();
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  *y = y1 << 1;
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}
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#endif
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#ifndef _V_CLIP_MATH
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#define _V_CLIP_MATH
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static inline ogg_int32_t CLIP_TO_15(ogg_int32_t x) {
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  int tmp;
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  asm volatile("subs	%1, %0, #32768\n\t"
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	       "movpl	%0, #0x7f00\n\t"
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	       "orrpl	%0, %0, #0xff\n"
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	       "adds	%1, %0, #32768\n\t"
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	       "movmi	%0, #0x8000"
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	       : "+r"(x),"=r"(tmp)
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	       :
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	       : "cc");
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  return(x);
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}
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#endif
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#ifndef _V_LSP_MATH_ASM
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#define _V_LSP_MATH_ASM
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static inline void lsp_loop_asm(ogg_uint32_t *qip,ogg_uint32_t *pip,
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				ogg_int32_t *qexpp,
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				ogg_int32_t *ilsp,ogg_int32_t wi,
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				ogg_int32_t m){
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   130
  
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   131
  ogg_uint32_t qi=*qip,pi=*pip;
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   132
  ogg_int32_t qexp=*qexpp;
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   133
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   134
  asm("mov     r0,%3;"
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   135
      "mov     r1,%5,asr#1;"
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   136
      "add     r0,r0,r1,lsl#3;"
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   137
      "1:"
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   138
      
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   139
      "ldmdb   r0!,{r1,r3};"
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   140
      "subs    r1,r1,%4;"          //ilsp[j]-wi
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   141
      "rsbmi   r1,r1,#0;"          //labs(ilsp[j]-wi)
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   142
      "umull   %0,r2,r1,%0;"       //qi*=labs(ilsp[j]-wi)
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   143
      
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   144
      "subs    r1,r3,%4;"          //ilsp[j+1]-wi
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   145
      "rsbmi   r1,r1,#0;"          //labs(ilsp[j+1]-wi)
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   146
      "umull   %1,r3,r1,%1;"       //pi*=labs(ilsp[j+1]-wi)
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   147
      
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   148
      "cmn     r2,r3;"             // shift down 16?
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   149
      "beq     0f;"
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   150
      "add     %2,%2,#16;"
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parents:
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   151
      "mov     %0,%0,lsr #16;"
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   152
      "orr     %0,%0,r2,lsl #16;"
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   153
      "mov     %1,%1,lsr #16;"
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   154
      "orr     %1,%1,r3,lsl #16;"
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   155
      "0:"
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   156
      "cmp     r0,%3;\n"
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parents:
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   157
      "bhi     1b;\n"
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   158
      
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   159
      // odd filter assymetry
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   160
      "ands    r0,%5,#1;\n"
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parents:
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   161
      "beq     2f;\n"
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   162
      "add     r0,%3,%5,lsl#2;\n"
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   163
      
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   164
      "ldr     r1,[r0,#-4];\n"
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parents:
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   165
      "mov     r0,#0x4000;\n"
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   166
      
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   167
      "subs    r1,r1,%4;\n"          //ilsp[j]-wi
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   168
      "rsbmi   r1,r1,#0;\n"          //labs(ilsp[j]-wi)
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   169
      "umull   %0,r2,r1,%0;\n"       //qi*=labs(ilsp[j]-wi)
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   170
      "umull   %1,r3,r0,%1;\n"       //pi*=labs(ilsp[j+1]-wi)
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   171
      
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   172
      "cmn     r2,r3;\n"             // shift down 16?
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   173
      "beq     2f;\n"
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   174
      "add     %2,%2,#16;\n"
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   175
      "mov     %0,%0,lsr #16;\n"
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   176
      "orr     %0,%0,r2,lsl #16;\n"
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   177
      "mov     %1,%1,lsr #16;\n"
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   178
      "orr     %1,%1,r3,lsl #16;\n"
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   179
      
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   180
      //qi=(pi>>shift)*labs(ilsp[j]-wi);
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   181
      //pi=(qi>>shift)*labs(ilsp[j+1]-wi);
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   182
      //qexp+=shift;
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   183
      
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   184
      //}
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   185
	 
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   186
      /* normalize to max 16 sig figs */
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   187
      "2:"
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diff changeset
   188
      "mov     r2,#0;"
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   189
      "orr     r1,%0,%1;"
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parents:
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   190
      "tst     r1,#0xff000000;"
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parents:
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   191
      "addne   r2,r2,#8;"
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   192
      "movne   r1,r1,lsr #8;"
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parents:
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   193
      "tst     r1,#0x00f00000;"
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parents:
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   194
      "addne   r2,r2,#4;"
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   195
      "movne   r1,r1,lsr #4;"
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   196
      "tst     r1,#0x000c0000;"
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   197
      "addne   r2,r2,#2;"
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   198
      "movne   r1,r1,lsr #2;"
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   199
      "tst     r1,#0x00020000;"
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parents:
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   200
      "addne   r2,r2,#1;"
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   201
      "movne   r1,r1,lsr #1;"
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parents:
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   202
      "tst     r1,#0x00010000;"
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parents:
diff changeset
   203
      "addne   r2,r2,#1;"
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parents:
diff changeset
   204
      "mov     %0,%0,lsr r2;"
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parents:
diff changeset
   205
      "mov     %1,%1,lsr r2;"
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parents:
diff changeset
   206
      "add     %2,%2,r2;"
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   207
      
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   208
      : "+r"(qi),"+r"(pi),"+r"(qexp)
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   209
      : "r"(ilsp),"r"(wi),"r"(m)
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   210
      : "r0","r1","r2","r3","cc");
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   211
  
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   212
  *qip=qi;
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   213
  *pip=pi;
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   214
  *qexpp=qexp;
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   215
}
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   216
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   217
static inline void lsp_norm_asm(ogg_uint32_t *qip,ogg_int32_t *qexpp){
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   218
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   219
  ogg_uint32_t qi=*qip;
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   220
  ogg_int32_t qexp=*qexpp;
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   221
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   222
  asm("tst     %0,#0x0000ff00;"
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   223
      "moveq   %0,%0,lsl #8;"
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parents:
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   224
      "subeq   %1,%1,#8;"
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parents:
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   225
      "tst     %0,#0x0000f000;"
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parents:
diff changeset
   226
      "moveq   %0,%0,lsl #4;"
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parents:
diff changeset
   227
      "subeq   %1,%1,#4;"
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parents:
diff changeset
   228
      "tst     %0,#0x0000c000;"
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parents:
diff changeset
   229
      "moveq   %0,%0,lsl #2;"
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parents:
diff changeset
   230
      "subeq   %1,%1,#2;"
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parents:
diff changeset
   231
      "tst     %0,#0x00008000;"
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parents:
diff changeset
   232
      "moveq   %0,%0,lsl #1;"
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parents:
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   233
      "subeq   %1,%1,#1;"
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   234
      : "+r"(qi),"+r"(qexp)
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   235
      :
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   236
      : "cc");
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   237
  *qip=qi;
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   238
  *qexpp=qexp;
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   239
}
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   240
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   241
#endif
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   242
#endif
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   243